Ferroelectric Junction Transistors: When a Heterojunction Learns to Remember
11 May 2026, Lynn
The ferroelectric junction transistor achieves non-volatile memory by modulating the energy barrier at a heterojunction with a 900 meV range.
What if a single material junction could do what an entire transistor circuit does today — store data permanently, switch in nanoseconds, and operate reliably at temperatures that would fry conventional memory chips? That’s the question posed by a team led by Baoyu Wang and Fei Xue, whose work on a new type of memory device appears in a preprint (arXiv:2510.10521).
For decades, the semiconductor industry has organised memory into a rigid hierarchy: fast but volatile SRAM for caches, slower but persistent flash for storage, and various emerging technologies that promise the best of both but rarely deliver. Each category makes a trade-off — speed for retention, endurance for density, temperature tolerance for power efficiency. The question has always been: can one device do it all?
Wang and colleagues think they have found a starting point. Their device, called a ferroelectric junction field-effect transistor (Fe-JFET) memory, is built from two atomically thin materials stacked in a heterojunction — a p-n junction where one side is ferroelectric. The key insight is that the ferroelectric layer’s polarization can be switched electrically, and that switching modulates the energy barrier at the junction by an astonishing amount.
How the junction works
The two materials in this device are p-type tin selenide (SnSe) and n-type ferroelectric alpha-indium selenide (α-In₂Se₃). When placed in contact, the mismatch in their electronic structures creates a depletion region — a zone where mobile charge carriers are swept away, leaving behind only fixed charges. This depletion region acts as a barrier to current flow, effectively turning the junction into a diode. The quality of this barrier determines everything: leakage current, switching speed, and ultimately whether the device behaves like an ideal switch.
The junction quality was near-ideal: the reverse leakage current sits at about 0.1 pA — so small it approaches the noise floor of most measurement equipment. The diode ideality factor, a number that tells you how close a real diode is to the theoretical ideal, was measured at 1.95. A perfect diode scores 1.0; real devices often exceed 2.0. This result puts the SnSe/α-In₂Se₃ junction among the highest-quality van der Waals heterojunctions reported so far.
The magic, however, lies not in the junction quality alone but in what the ferroelectric layer can do. α-In₂Se₃ is ferroelectric — its crystal structure has a built-in electric polarization that can be flipped by an applied voltage. In the junction, the ferroelectric side acts as a gate that changes the band alignment. Think of it like adjusting the height of a dam wall by remote control. The team achieved a barrier modulation of 900 meV — enough to switch the device from fully conducting to fully blocking, corresponding to a change in current of many orders of magnitude.
This is not a gradual tuning effect; it’s a binary switch with memory. The ferroelectric polarization state is non-volatile — it stays where you put it, even when power is removed. The junction thus acts as both a transistor and a memory cell simultaneously.
A new device architecture
Conventional ferroelectric field-effect transistors (Fe-FETs) come in two flavours: one uses a ferroelectric gate dielectric on top of a semiconductor channel; the other uses a ferroelectric channel with a conventional gate. Both suffer from the same problem: the ferroelectric switching is coupled to the channel’s resistance, leading to charge trapping, limited endurance, and poor retention at high temperatures.
Wang and colleagues propose a fundamentally different approach. Their Fe-JFET uses the ferroelectric layer as one side of the p-n junction itself, not as a gate or channel. The switching happens at the junction interface, where the ferroelectric polarization modifies the depletion region. This decouples the memory action from the charge transport path, avoiding many of the failure modes that plague conventional Fe-FETs.
The advantage is immediate: write operations take about 100 nanoseconds, and the device operates reliably up to 393 K (a comfortable room — about 120°C). The memory window, a measure of how clearly the two states are separated, stands at about 1.8 V — large enough that a read voltage of 0.5 V will not accidentally flip the state.
What the numbers mean
Here we must pause and look at the data with a critical eye. The headline results are impressive, but what do they actually mean for practical memory technology?
Cycle-to-cycle variation, a critical reliability metric, sits at just 2%. For comparison, many emerging memory technologies show variation of 10–20%, making multi-level storage unreliable. A 2% variation opens the door to reliable multi-bit operation — each cell could store two or even three bits instead of just one. This is the difference between a laboratory curiosity and a technology with genuine potential.
The speed of 100 nanoseconds places this device in a curious regime. It is faster than flash memory (which takes microseconds to write) but slower than SRAM (a few nanoseconds). It sits in the gap where embedded memory for microcontrollers, Internet of Things nodes, and automotive electronics lives — applications that need non-volatile storage with moderate speed and high reliability at elevated temperatures. The operating temperature of 393 K (about 120°C) is particularly notable: it approaches the automotive standard of 398 K (125°C) — a demanding target that most flash memory cannot meet. Most flash memory degrades above 358 K (85°C).
But the data also reveal limitations. The device requires a write voltage of several volts, which is higher than the sub-1-volt operation demanded by advanced nodes. The retention time is not yet specified — a critical omission for a non-volatile memory technology. And the paper reports only single-device results, not array-level statistics that would reveal yield, uniformity, and scaling behaviour.
This is honest science: the authors demonstrate a new principle with compelling evidence, but they do not claim to have solved every engineering challenge. The milestone is real; the finish line is not yet visible.
Beyond memory: synapse-like behaviour
Perhaps the most intriguing part of the paper is the demonstration of synaptic characteristics. By applying a train of voltage pulses with different polarities, the team showed that the junction’s conductance can be gradually increased (potentiation) or decreased (depression), mimicking the weight update in a biological synapse. The pattern is stable, repeatable, and linear over many cycles.
This opens a door to neuromorphic computing — hardware that emulates the brain’s architecture rather than simulating it on conventional processors. The Fe-JFET’s ability to both store a weight and process a signal in the same device is exactly what neuromorphic engineers have been seeking: a compact, energy-efficient building block that combines memory and computation at the point of use.
Unlike dinner guests who can occupy all choices simultaneously, the junction’s states are discrete — but the analogue-like tuning between them creates a continuum of conductances that maps naturally onto synaptic weights. This is not a perfect analogy for biological plasticity, but a workable engineering approximation that could be built into chips within a few years.
The road ahead
The team’s work does not claim to have solved every problem in non-volatile memory. It does, however, open a new path by combining three properties rarely found together in a single device: near-ideal junction quality, large barrier modulation, and ferroelectric switching at practical voltages.
The next steps are clear. The device geometry must be scaled to nanometre dimensions and integrated into crossbar arrays. The switching endurance — how many write cycles before degradation — must be measured and optimised. The retention time must be quantified at elevated temperatures. And the write voltage must be reduced to compete with mainstream technologies.
What matters now is not whether this specific device becomes a product. What matters is that the field now has a new building block — a switchable heterojunction memory that challenges the assumption that ferroelectric memories must be either gate-based or channel-based. The Fe-JFET shows that the interface itself can be the memory element.
For a field that has long treated memory and logic as separate domains, this work offers a glimpse of a different future: one where the junction is not just a contact between materials, but a functional device that learns, remembers, and computes all at once.
Lynn is an online editor of LoomSci
References
- Baoyu Wang et al., A ferroelectric junction transistor memory made from switchable van der Waals p-n heterojunctions, arXiv:2510.10521